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Tidy-up AssmScatr, NeuBndCond, and DirBndCond CUDA implementation

Issue/feature addressed

  • The AssmbScatr kernels are updated for coalesced memory access
  • CUDA grid size calculations are now encapsulated within kernel launchers. This will eventually allow grid size optimization for each individual kernel and for specific GPU device, if desired.
  • Eliminate duplicate host memory allocation in operator constructors. Nektar Array's are now used for temporary host memory storage. Memory is deallocated after construction.

Proposed solution

Implementation

Tests

Suggested reviewers

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Notes

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Checklist

  • Functions and classes, or changes to them, are documented.
  • [ ] User guide/documentation is updated.
  • [ ] Changelog is updated.
  • [ ] Suitable tests added for new functionality.
  • Contributed code is correctly formatted. (See the contributing guidelines).
  • [ ] License added to any new files.
  • No extraneous files have been added (e.g. compiler output or test data files).
Edited by Jacques Xing

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